Vidwan-ID : 117826



  • Dr S P Joy Vasantha Rani

  • Professor
  • Anna University
Publications 2004 - 2024

Publications

  • 33
    Journal Articles
  • 37
    Conference
    Proceedings
  • 1
    Aip
  • 4
    Projects
  • 2
  • 30

Citations / H-Index

131 Citations
7 h-index
81 Citations

Google Scholar

Co-author Network


Expertise

Electrical and Electronic Engineering

Digital VLSI, FPGA designs

Personal Information

Dr S P Joy Vasantha Rani

Female
Department of Electronics Engineering, Anna University
Chennai, Tamil Nadu, India - 600044


Experience

  • Professor

    Department of Electronics Engineering

    Anna University

  • Associate Professor

    Anna University

  • Assistant Professor - Selection Grade

    Anna University

  • Assistant Professor (Senior Grade)

    Anna University

  • Assistant Professor

    Anna University

  • Teaching Associate

    Anna University


Qualification

  • Ph.D

    Madras Institute of Technology, Anna University, Chennai

  • M.E

    College of Engineering, Guindy, Anna University

  • B.E.

    Government College of Engineering, Tirunelveli, Madurai Kamaraj University


Doctoral Theses Guided

2022

AN EFFICIENT FPGA ARCHITECTURE BASED ON HYBRID LOGIC BLOCKS AND PERFORMANCE ENHANCEMENT OF FPGA USING PLACEMENT AND ROUTING ALGORITHMS

P.Sudhanya, Anna University

2020

EMBEDDED EVOLVABLE HARDWARE DESIGN OF DIGITAL CIRCUITS USING BIOINSPIRED ALGORITHMS

Ranjith C, Anna University

2020

DIGITAL PULSE SKIPPING MODULATION STRATEGIES FOR DC DC CONVERTERS TO IMPROVE THE POWER CONVERSION EFFICIENCY AT PARTIALLY LOADED CONDITIONS AND INCORPORATION OF PFC

R.Thangam, Anna University

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2022

AN EFFICIENT FPGA ARCHITECTURE BASED ON HYBRID LOGIC BLOCKS AND PERFORMANCE ENHANCEMENT OF FPGA USING PLACEMENT AND ROUTING ALGORITHMS

P.Sudhanya, Anna University

2020

EMBEDDED EVOLVABLE HARDWARE DESIGN OF DIGITAL CIRCUITS USING BIOINSPIRED ALGORITHMS

Ranjith C, Anna University

2020

DIGITAL PULSE SKIPPING MODULATION STRATEGIES FOR DC DC CONVERTERS TO IMPROVE THE POWER CONVERSION EFFICIENCY AT PARTIALLY LOADED CONDITIONS AND INCORPORATION OF PFC

R.Thangam, Anna University

2019

INTELLIGENT FAULT LOCATION ISOLATION AND SERVICE RESTORATION IN DISTRIBUTION SYSTEM

C.Indhumathi , Anna University

2019

DESIGN OF BUILT IN SELF TEST FOR ANALOG TO DIGITAL CONVERTER WITH STATIC ERROR MODELLING AND CALIBRATION

M.Senthil Sivakumar, Anna University

2018

MULTIPLIERLESS IMPLEMENTATION OF AREA EFFICIENT MULTIRATE FIR FILTER STRUCTURES FOR SAMPLING RATE CONVERSION

K.Mariammal, Anna University

2017

INVESTIGATION OF SWARM INTELLIGENCE TECHNIQUES TO ENHANCE CHANNEL EQUALIZATION

D.C.Diana, Anna University

2017

RECONFIGURABLE AND DEDICATED FIR FILTERS INTERPOLATORS AND MODULATORS FOR SDR

S.C.Prasanna, Anna University

2016

EFFICIENT FIR FILTER ARCHITECTURES FOR MULTICHANNEL FILTERING AND ADAPTIVE FILTERING

J.Britto Pari, Anna University

,

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Membership In Professional Bodies

IETE

Life Member

ISTE

Life Member

IETE

Life Member

ISTE

Life Member

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Research Projects

Performance Enhancement in FPGA Architecture by Efficient design of logic blocks

Funding Agency : DST - Kiran Division under Women Scientist scheme - A

FPGA based Real-time visual static hand gesture recognition system

Funding Agency : CTDT, Anna University

HER - Harassment Emergency Rescuer

Funding Agency : CTDT, Anna University

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Performance Enhancement in FPGA Architecture by Efficient design of logic blocks

Funding Agency : DST - Kiran Division under Women Scientist scheme - A

FPGA based Real-time visual static hand gesture recognition system

Funding Agency : CTDT, Anna University

HER - Harassment Emergency Rescuer

Funding Agency : CTDT, Anna University

Sounds of Actions - A Technical aid for Speaking Disabled

Funding Agency : CTDT, Anna University

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